\u56de\u8def\u56f3\u8d85\u30c1\u30a7\u30c3\u30af\u3057\u307e\u304f\u308a\u3002
\n[PCI Bus]
\n+ \u30aa\u30b7\u30ec\u30fc\u30bf\u306e\u90e8\u54c1\u3092\u66f4\u65b0
\n+ SYSCLK \u306e\u30c6\u30d6\u30ca\u30f3\u7d42\u7aef\u62b5\u6297\u306b\u30b3\u30e1\u30f3\u30c8\u306a\u3057
\n[VTT\/Vref]
\n+ \u7279\u306b\u306a\u3057
\n[Local Bus]
\n+ USRCLK \u304c Bank 2 \u306b\u3064\u306a\u304c\u3063\u3066\u308b\u304c\u3001source \u306b\u306a\u308b\u30aa\u30b7\u30ec\u30fc\u30bf\u304c\u306a\u3044?
\n+ Virtex \u306e\u307b\u3046\u306e LED \u63a5\u7d9a
\n– LED \u306e\u8272\u66f8\u3044\u3066\u306a\u3044
\n+ \u30c7\u30d0\u30c3\u30b0\u30d4\u30f3
\n+ JTAG \u306e\u30b3\u30cd\u30af\u30bf\u3068\u304b\u3002TCK \u3069\u3046\u306b\u304b\u3057\u306a\u3044\u3068
\n+ M0, M1, M2, PCI_M66EN \u306e\u30b9\u30a4\u30c3\u30c1\u3068\u304b
\n+ Bank0 \u306e HSWAPEN \u3068\u304b\u306e\u51e6\u7406
\n+ \u4e71\u6570\u30b8\u30a7\u30cd\u30ec\u30fc\u30bf\u3092 Bank 2 \u3042\u305f\u308a\u306b\u63a5\u7d9a
\n[SRAM 5\/6]
\n+ SRAM6 \u306eH11 \u306b junction \u304c\u51fa\u3066\u308b
\n[SRAM 1\/2\/3\/4]
\n+ \u7279\u306b\u7570\u5e38\u306f\u611f\u3058\u3089\u308c\u307e\u305b\u3093\u3067\u3059
\n[SRAM\u96fb\u6e90]
\n+ \u5909\u306a junction \u304c Vss \u306e\u3042\u305f\u308a\u306b\u591a\u767a
\n+ GND \u3082\u3061\u3083\u3093\u3068\u30cd\u30c3\u30c8\u540d\u5165\u308c\u307e\u3057\u3087\u3046
\n[FPGA\u96fb\u6e90]
\n+ VCCAUX \u306f 2.5v \u3067\u3044\u3044\u306e\u306d? \u3053\u308c\u3063\u3066 VCCO_0 \u3068\u306f\u3069\u3046\u9055\u3046\u306e\u3058\u3083 (\u2190\u3042\u3046\u3042\u3046\u3001\u3042\u307b\u3067\u3057\u305f\u3002VCCO_0 \u306f\u3064\u307e\u308a\u3001\u5236\u5fa1\u7cfb\u306e\u4fe1\u53f7\u30d4\u30f3\u306e I\/O \u306e\u96fb\u5727\u3067\u3042\u3063\u3066\u3001VCCAUX \u306f\u5236\u5fa1\u56de\u8def\u305d\u306e\u3082\u306e\u306e\u96fb\u6e90\u306a\u308f\u3051\u3067\u3059\u306d)
\n+ \u305f\u3076\u3093\u63a5\u7d9a\u5b8c\u4e86\u3002\u30d0\u30f3\u30af\u3054\u3068\u306e\u96fb\u5727\u518d\u70b9\u691c\u5fc5\u8981
\nBank 2\/4 = \u5357\u5074\u4e2d\u592e (4\u304c\u5185\u5074\u306e\u3084\u3064)
\nBank 1\/3 = \u5317\u5074\u4e2d\u592e (3\u304c\u5185\u5074\u306e\u3084\u3064)
\nBank 0: \u3064\u307e\u308a\u5236\u5fa1\u7cfb\u3067\u3059\u304c\u3001\u3053\u3053\u306e\u96fb\u6e90\u96fb\u5727\u3063\u3066\u3069\u3046\u3059\u308b\u306e? 3.3v \u3067\u3044\u3044\u306e\u304b?
\nBank 1: SATA \u306e\u4e88\u5b9a = 2.5v
\nBank 2: SYSCLK \/ USRCLK = 3.3v \u5e0c\u671b\u3002Configuration \u306e D[7:0] \u304c\u3042\u308b\u3093\u3067\u3059\u3051\u3069?
\nBank 3: SATA \u306e\u4e88\u5b9a = 2.5v
\nBank 4: LED\u3064\u306a\u304e\u305f\u3044 = 3.3v
\nBank 5: SRAM5\/6 = 1.8v
\nBank 6: SRAM1\/2\/3\/4 = 1.8v
\nBank 7: \u30ed\u30fc\u30ab\u30eb\u30d0\u30b9 = 3.3v
\nBank 8: SRAM1\/2\/3\/4 = 1.8v
\nBank 9: SRAM5\/6 = 1.8v
\nBank 10: SRAM1\/2\/3\/4 = 1.8v
\nBank 11: \u30ed\u30fc\u30ab\u30eb\u30d0\u30b9 = 3.3v
\nBank 12: SRAM1\/2\/3\/4 = 1.8v
\nBank 13: SRAM5\/6 = 1.8v
\nBank 14: SRAM1\/2\/3\/4 = 1.8v
\n[\u96fb\u6e90\u56de\u8def]
\n\u306a\u3093\u3068\u3001\u5b9f\u306f\u307e\u3060\u63cf\u3044\u3066\u306a\u304b\u3063\u305f\u306e\u3060\u3088\uff01
\n+ FPGA Core: 1.2v
\n+ RAM: 1.8v
\n+ \u305d\u306e\u307b\u304b: 2.5v
\n+ PCI \u304b\u3089: 3.3v
\n[SATA]
\n\u30b3\u30cd\u30af\u30bf\u306e\u90e8\u54c1\u63cf\u304f\u5fc5\u8981\u3042\u308a\u3002\u540c\u4e00\u7b50\u4f53\u5185\u3067\u4f7f\u3046\u304b\u3089 DC coupling \u3067\u3044\u3044\u3084\u3002GND \u5171\u901a\u3067\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"
[Sheet 1 of 5] – \u30aa\u30b7\u30ec\u30fc\u30bf\u306e\u90e8\u54c1\u3092\u66f4\u65b0- SYSCLK \u306e\u30c6\u30d6\u30ca\u30f3\u7d42\u7aef\u62b5\u6297\u306b\u30b3\u30e1\u30f3\u30c8\u306a\u3057[Sheet 2 of 5]- \u7279\u306b\u306a\u3057[Sheet 3 of 5]- USRCLK \u304c Bank 2 \u306b\u3064\u306a\u304c\u3063\u3066\u308b\u304c\u3001source \u306b\u306a\u308b\u30aa\u30b7\u30ec\u30fc\u30bf\u304c\u306a\u3044?- Virtex \u306e\u307b\u3046\u306e LED \u63a5\u7d9a- LED \u306e\u8272\u66f8\u3044\u3066\u306a\u3044- JTAG \u306e\u30b3\u30cd\u30af\u30bf\u3068\u304b\u3002<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"activitypub_content_warning":"","activitypub_content_visibility":"","activitypub_max_image_attachments":4,"activitypub_interaction_policy_quote":"anyone","activitypub_status":"","footnotes":""},"categories":[7,4],"tags":[],"class_list":["post-974","post","type-post","status-publish","format-standard","hentry","category-7","category-4"],"_links":{"self":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/posts\/974","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/comments?post=974"}],"version-history":[{"count":0,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/posts\/974\/revisions"}],"wp:attachment":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/media?parent=974"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/categories?post=974"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/tags?post=974"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}