Four ages of FPGAs:
\n– 1984-1991: Invention
\n– 1992-1999: Expansion
\n– 2000-2007: Accumulation
\n– 2008-2015: Specialization
\nAge of Invention:
\n– Tight technology limits: much smaller than application size
\n– Efficiency is key
\n– Design automation is secondary to capacity
\nAge of Expansion:
\n– metal layer \u304c\u5897\u3048\u3066\u3001wire \u304c\u4e00\u6c17\u306b\u5897\u3048\u305f
\nAge of Accumulation:
\n– Process tech: complexity eliminates “casual” ASIC users
\n– FPGAs are larger than the typical problem size
\n– Logic capacity limited by I\/O and mem bandwidth
\n– Power is growing concern
\n– Design effort takes on a new dimension: complete digital systems on FPGAs require new design skills
\nAge of Specialization:
\n– Dual challenges of VLSI: giga-scale & deep submicron
\n– Logic cells, memory, multiplier and I\/O: \u5897\u52a0\u901f\u5ea6\u304c\u305d\u308c\u305e\u308c\u9055\u3046
\n– I\/O per gate \u306f 1\/60 \u306b\u3082\u306a\u3063\u3066\u3044\u308b\uff01 (\u3053\u308c\u306f microprocessor \u3067\u3082\u540c\u3058)
\n– Application domain \u306b\u7279\u5316\u3055\u305b\u308b\u3053\u3068\u3067\u30b3\u30b9\u30c8\u3092\u6700\u9069\u5316: “ASIC FPGA”
\nXIlinx FSB module: V5 on Xeon FSB at 1066MHz
\nConfigurable Computing \u306b\u5fc5\u8981\u306a\u3082\u306e
\n– \u30d0\u30a4\u30ca\u30ea\u4e92\u63db\u6027
\n– 5-minute compiles
\n– native compilers
\n– source level debugging<\/p>\n","protected":false},"excerpt":{"rendered":"