{"id":1328,"date":"2006-08-30T16:11:01","date_gmt":"2006-08-30T07:11:01","guid":{"rendered":"http:\/\/yasu2.prosou.nu\/blog\/index.php\/2006\/08\/30\/fpl2006_aug29\/"},"modified":"2006-08-30T16:11:01","modified_gmt":"2006-08-30T07:11:01","slug":"fpl2006_aug29","status":"publish","type":"post","link":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/2006\/08\/30\/1328\/","title":{"rendered":"FPL2006 (Aug.29 \u5348\u524d)"},"content":{"rendered":"<p>\u518d\u5e30\u3067\u3059\u3088\u518d\u5e30\u3002<br \/>\n\u307e\u3042\u3001\u518d\u5e30\u306e\u767a\u8868\u306e\u4eba\u306f\u3001\u3069\u3063\u304b\u3044\u3063\u3061\u3083\u3063\u3066\u3053\u306a\u304b\u3063\u305f\u3093\u3067\u3059\u304c\u3002<\/p>\n<p><!--more--><br \/>\n[ T1.C: Design Technuiques I ]<br \/>\nMapping Recursive Functions to Reconfigurable Hardware<br \/>\n\u767a\u8868\u8005\u3053\u306a\u304b\u3063\u305f\u3002\u3068\u306a\u308a\u306e\u4eba\u304c\u300c\u91d1\u8fd4\u305b\u3088\u306a\u30fc\u300d\u3001\u3068(\u7b11)\u3002<br \/>\nA System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification<br \/>\n\u8a2d\u8a08\u671f\u9593\u306b\u3057\u3081\u308b\u3001integration \u3068\u691c\u8a3c\u306e\u6642\u9593\u306e\u5272\u5408\u306f\u304b\u306a\u308a\u9577\u3044\u306e\u3067\u3001\u3053\u308c\u3092\u306a\u3093\u3068\u304b\u3057\u3088\u3046\u305c\u3001\u3068\u3044\u3046\u8a71\u3002SIMPPL SoC Model \u3092\u63d0\u6848\u3002\u5b9a\u7fa9\u6e08\u307f\u306e\u30e2\u30b8\u30e5\u30fc\u30eb\u9593\u63a5\u7d9a\u6a5f\u69cb (CE: Communication Element) \u3092\u3064\u304b\u3046\u3053\u3068\u3067\u4e16\u306e\u4e2d\u3092\u7c21\u5358\u306b\u3057\u3088\u3046\u3068\u3059\u308b\u3002<br \/>\n\u306f\u3058\u3081\u306e\u6bb5\u968e\u3067\u306f\u30b7\u30df\u30e5\u30ec\u30fc\u30b7\u30e7\u30f3\u3067\u691c\u8a3c\u3092\u3059\u308b\u3093\u3060\u3051\u3069\u3001PE \u3068 CE \u306e integration \u304c\u7d42\u308f\u3063\u305f\u3089\u3001\u500b\u3005\u306e PE \u3092\u53d6\u308a\u51fa\u3057\u3066\u3001\u5b9f\u6a5f\u3067\u52d5\u304b\u3057\u3066 system C \u3068\u304b\u306e\u4e0a\u4f4d\u8a00\u8a9e\u3067\u66f8\u304b\u308c\u305f\u4f55\u304b\u3092\u8d70\u3089\u305b\u305f\u7d50\u679c\u3068\u7167\u5408\u3059\u308b\u3002<br \/>\n\u3053\u306e\u65b9\u6cd5\u3067\u5b66\u751f\u306b MPEG-1 decoder \u3092\u4f5c\u3089\u305b\u3066\u307f\u305f\u3089\u3001\u958b\u767a\u671f\u9593\u306e 85% \u304c\u3001\u6700\u521d\u306e\u30e2\u30b8\u30e5\u30fc\u30eb\u5b9f\u88c5\u306b\u306a\u3063\u305f\u3002<br \/>\nMicro-coded Datapathes: Populating the Space Between Finite State Machine and Processor<br \/>\n\u56de\u8def\u3068\u3057\u3066\u3067\u304d\u3042\u304c\u3063\u305f\u308a\u3001\u305d\u3053\u306b load \u3055\u308c\u308b\u3082\u306e\u306f\u3001\u308f\u3057\u306e\u30b7\u30df\u30e5\u30ec\u30fc\u30bf\u306e\u5236\u5fa1\u6a5f\u69cb\u307f\u305f\u3044\u306b\u3001instruction code \u306b\u3088\u3063\u3066\u30c7\u30fc\u30bf\u30d1\u30b9\u3092\u3070\u3057\u3070\u3057\u5207\u308a\u66ff\u3048\u308b\u3088\u3046\u306a\u3082\u306e\u306a\u306e\u3060\u304c\u3001\u305d\u308c\u3092\u5168\u90e8\u81ea\u52d5\u751f\u6210\u3059\u308b\u3088\u3046\u306a\u611f\u3058\u306b\u306a\u3063\u3066\u3044\u308b\u6a21\u69d8\u3002\u30c7\u30b6\u30a4\u30f3\u7a7a\u9593\u63a2\u7d22\u3068\u304b\u3082\u3059\u308b\u3088\u3046\u306b\u306a\u3063\u3066\u304a\u308a\u3001\u3051\u3063\u3053\u3046\u3061\u3083\u3093\u3068\u3057\u305f\u30c4\u30fc\u30eb\u3060\u3002\u3057\u304b\u3057\u3001\u751f\u6210\u30c4\u30fc\u30eb\u306b\u4e0e\u3048\u308b\u8a00\u8a9e\u306f\u5c02\u7528\u306e\u3082\u306e\u307f\u305f\u3044\u306a\u306e\u3067\u3001\u6b8b\u5ff5\u306a\u304c\u3089\u3059\u3050\u306f\u4f7f\u3048\u306a\u3044\u306d\u3002FSM \u306b\u3088\u308b\u3082\u306e\u3088\u308a(\u305f\u3044\u3066\u3044)\u9045\u304f\u3066\u5927\u304d\u3044\u3051\u3069\u3001MicroBlaze \u3088\u308a\u5c0f\u3055\u304f\u3066\u901f\u3044\u3002\u307b\u3078\u30fc\u3002\u81ea\u52d5\u3063\u3066\u3044\u3046\u306e\u304c\u3044\u3044\u3067\u3059\u306d\u3002<br \/>\n[ T2.B: Multiprocessor Systems ]<br \/>\nEfficient Automated Synthesis, Programming, and Implementation of Multiprocessor Platforms on FPGA Chips<br \/>\n\u30de\u30eb\u30c1\u30d7\u30ed\u30bb\u30c3\u30b5\uff0bHW IP \u306a\u30b7\u30b9\u30c6\u30e0\u3092 FPGA \u306a\u3093\u304b\u306b\u69cb\u7bc9\u3059\u308b\u5834\u5408\u3001\u5171\u6709\u30d0\u30b9\u3060\u3051\u3067\u306f\u6027\u80fd\u304c\u51fa\u306a\u3044\u306e\u3067\u3001\u305d\u3053\u3092\u3046\u307e\u304f\u3084\u308b\u624b\u6cd5\u306e\u958b\u767a\u3002<br \/>\n\u30d7\u30ed\u30bb\u30c3\u30b5 (PPC, MicroBlaze) \u3001\u30e1\u30e2\u30ea\u3001\u30e2\u30b8\u30e5\u30fc\u30eb\u9593\u306e\u901a\u4fe1\u30b3\u30f3\u30dd\u30fc\u30cd\u30f3\u30c8\u306a\u3069\u3092 parameterizable \u306b\u3057\u305f\u3002Kahn Process Networks \u3068\u3044\u3046\u306e\u3092\u4f7f\u3063\u3066\u30b7\u30b9\u30c6\u30e0\u3092\u8a18\u8ff0\u3059\u308b\u3002Platform, Mapping \u3068 KPN \u3092 XML \u3067\u8a18\u8ff0\u3057\u3066\u30c4\u30fc\u30eb\u306b\u98df\u308f\u305b\u308b\u3068\u3001RTL \u306a\u8a18\u8ff0\u3068\u304b\u304c\u51fa\u3066\u304f\u308b\u3002\u307b\u3078\u30fc\u3002<br \/>\nTMD-MPI: An MPI Implementation for Multiple Processors Across Multiplie FPGAs<br \/>\n\u3073\u3073\u3063\u3068\u304d\u305f\u306e\u3067\u5185\u8077\u3057\u3066\u307e\u3057\u305f\u3002\u304f\u305d\u3001\u767a\u8868\u3082\u9762\u767d\u304b\u3063\u305f\u306e\u306b\u306a\u3002<br \/>\n\u901a\u4fe1\u306e\u4fe1\u983c\u6027\u306b\u3064\u3044\u3066\u8cea\u554f\u3068\u304b\u51fa\u3066\u307e\u3057\u305f\u3002on-chip \u306f\u3082\u3061\u308d\u3093\u5b89\u5fc3\u3002off-chip \u306f MGT \u4f7f\u3046\u306e\u3067\u3059\u304c\u3001\u307e\u3001\u305d\u306e\u3078\u3093\u3067\u30a8\u30e9\u30fc\u8a02\u6b63\u307f\u305f\u3044\u306a\u306e\u3068\u304b\uff08\u3067\u304d\u308c\u3070\uff09\u3059\u308b\u611f\u3058\u3002<br \/>\nARCHLOG: High-level Synthesis of Reconfigurable Multiprocessors for Logic Programming<br \/>\n\u5c02\u7528\u306e\u8a00\u8a9e\u3067\u307b\u3052\u307b\u3052\u3001\u3068\u8a18\u8ff0\u3057\u3066\u3001multi PicoBlaze \u306a\u30b7\u30b9\u30c6\u30e0\u3092\u4f5c\u308b\u3002<br \/>\nPicoBlaze \u306f configurable processor \u3060\u304b\u3089\u306a\u3002\u697d\u3057\u3052\u3002\u3057\u304b\u3082\u901f\u3044\u305c\uff01<br \/>\n\u306a\u3093\u304b\u306b\u4f7f\u3048\u306a\u3044\u304b\u306a\u30fc\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"<p>\u518d\u5e30\u3067\u3059\u3088\u518d\u5e30\u3002<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"activitypub_content_warning":"","activitypub_content_visibility":"","activitypub_max_image_attachments":4,"activitypub_interaction_policy_quote":"anyone","activitypub_status":"","footnotes":""},"categories":[10],"tags":[],"class_list":["post-1328","post","type-post","status-publish","format-standard","hentry","category-conference-logs"],"_links":{"self":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/posts\/1328","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/comments?post=1328"}],"version-history":[{"count":0,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/posts\/1328\/revisions"}],"wp:attachment":[{"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/media?parent=1328"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/categories?post=1328"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/yasu2.prosou.nu\/blog\/index.php\/wp-json\/wp\/v2\/tags?post=1328"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}